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by Roger H. Grace, Roger Grace Associates
In the September/October issue of Small Times (p.32) I introduced
a “MEMS Commercialization Report Card” which addressed 14 barriers
needed to be overcome to realize a successful commercialization
process for MEMS. Three of the “tier one” barriers are marketing,
infrastructure, and design for manufacturing and test/calibration
(DFM/DFTC). In this article, I will solely address the issues of
DFM/DFTC as it relates to the concept of MEMS-based system solutions
vs. the issue of individual MEMS devices.
Click here to enlarge
image
Figure 1:
Early version of ADXL accelerometer showing high degree of
monolithic functional integration of signal conditioning
sharing the same chip with the accelerometer.
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MEMS devices and their development have historically been the
major focus of interest and resources for MEMS providers. One of the
purposes of this article is to provide MEMS designers as well as
people who are specifying MEMS into an application some “food for
thought” and encourage them to “think outside the chip” (i.e. the
MEMS device). Since the “S” in MEMS stands for systems, I believe
that we need to look carefully at all of the elements that provide
functionalities and support to MEMS devices so that they can be
optimally useful in a microelectronic-based solution.
If one can “think outside the chip” when designing or specifying
a system, one quickly realizes that the MEMS device plays a small
(but important) role in the overall system solution. The raw
physical, chemical, and optical signal with which a MEMS device
frequently interacts requires a great deal of signal conditioning
applied to it before it becomes a useful source of data/information
to the application. Typically, the signal conditioning consists of
functions including analog-to-digital conversion, amplification,
comparators, programmable memory (E2PROM), filtering, and
temperature sensor(s) for compensation. A big decision must be
reached at the outset of the design process as to where these
functions should reside–whether on the same chip as the MEMS, or on
another totally separate chip that will be connected to the MEMS
chip. In addition, the system designer needs to understand where the
functions of ESD protection, control logic, embedded software, and
power management should reside.
Once this partitioning strategy has been established, the
designer/system architect needs to look at the need for this
“system” to communicate with the outside world either from a wired
or wireless format. Finally, all of these system functionalities
need to be interconnected, packaged, and tested.
The main point here is that if a MEMS-based system solution is to
be commercially viable, the system electronic and mechanical
architecture for its creation must be addressed from day one by all
the members of the design/development team in order to optimize the
price-performance of the resulting solution–which includes
provisions for packaging, test, and calibration.
Looking at current industry examples of system partitioning
strategies, it’s clear there exist numerous various opinions and
approaches to accomplish this. The main criteria for selecting the
optimum partitioning strategy is based on a number of factors
including unit cost, NRE, process compatibility, production volume,
and–most importantly–performance. Analog Devices and its ADXL line
of accelerometers (Figure 1) have historically
taken the approach of integrating the signal conditioning functions
with the company’s capacitive accelerometer on the same piece of
silicon (though not for the entire ADXL product line). This highly
integrated monolithically integrated approach was also adopted by
MEMSIC in its accelerometer.
Conversely, organizations including Freescale (Figure
2), Kionix, VTI, and STMicroelectronics have adopted a
two-chip approach that separates the accelerometer sensor chip from
the signal conditioning ASIC.
Click here to enlarge
image
Figure 3:
MEMS CMOS analog microphone (1mm × 1mm) showing high degree of
monolithic functional integration of signal conditioning
electronics sharing same chip with the microphone.
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When we address the MEMS microphones partitioning strategy, we
see that Akustica (Figure 3) has adopted the
monolithic approach while the new market entrants, Analog Devices
and Wolfson as well as Infineon, and market pioneer and leader
Knowles Acoustics, have adopted the two-chip approach. Pulse
(formerly Sonion) has a three-chip approach in which the microphone
and ASIC are side-by-side mounted on a silicon substrate.
Eric Eisenhut, VP of sales and marketing at Kionix, notes that
the digital content of ASICs has increased dramatically, evolving
rapidly due to market demand. “We offer a number of ASIC options to
our customers that provide a broad range of functionalities to best
suit their specific application,” he says. “Our ASIC solutions
provide the capability to optimize our MEMS device performance ...we
do not need to have a perfect sensor, since the algorithms that we
have developed take into account the tolerances of the manufacturing
process.”
Click here to enlarge
image
Figure 4:
Chip-on-MEMS three axis accelerometer (2mm × 2mm) showing SOI
accelerometer stacked with ASIC. (Courtesy: VTI)
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On the microphone side, Marcie Weinstein, director of strategic
marketing at Akustica, touts the company’s “intimate knowledge of
the interface between our transducer and the surrounding
electronics” as the key to successfully designing a CMOS MEMS
microphone, enabling the company to innovate quickly and introduce
new products. As we can see, the ASIC and its functionalities
provide MEMS suppliers with a great deal of flexibility to satisfy
customers’ varied needs.
Unlike many semiconductors, MEMS devices need to be in contact
with the environment they measure. In the case of an accelerometer
or rate sensor (gyro), these devices find themselves mounted on a PC
board or substrate. With pressure sensors, however, many
applications consist of harsh media (e.g., engine oil or human
blood) and require mechanical attachments (e.g., screw threads).
These conditions require packages that must be robust but at the
same time low-cost, and must not influence the measurement of the
sensor by imparting stresses to it.
It is a well-known fact that MEMS packaging and test/calibration
typically constitute over 65% of the total cost of the solution.
Recently, the wafer-level packaging (WLP) technology popular in the
semiconductor industry has migrated into the MEMS area, which is a
common phenomenon. While WLP can effectively enclose or encapsulate
a MEMS device and provide it with bump solder capability, quite
frequently these devices find themselves inside of another
“mechanical” package. Most recently, chip-stacking approaches have
become popular with MEMS, as in the case of the Freescale line of
accelerometers, as well as the “chip-on-MEMS” chip-stacking approach
of VTI (Figure 4), which encapsulates a
silicon-on-insulator three-axis accelerometer between two glass
silicon capping chips. A “redistribution layer” connects the ASIC to
the accelerometer via a flip-chip bonding approach and routes the
signals from the accelerometer via the solder bumps to the system.
As such, this provides a standalone to packaging requiring no
additional external package, and associated manufacturing and
package cost.
Click here to enlarge
image
Figure 5:
Dual-redundant MEMS pressure sensor module with discrete ICs
provides numerous functions including electromagnetic
self-calibration, service history recording, and smart sensor
recalibration algorithm. (Courtesy:
axept/Bitronics) |
“Earlier versions of our accelerometers used a side-by-side
approach of the accelerometer sensor and its signal conditioning
ASIC,” said Ray Roop, member of Freescale’s technical staff. The
current Freescale approach has a chip stack with bond wires
connecting the accelerometer chip to the ASIC chip. It is
interesting to note that Analog Devices selected a two-chip approach
for its MEMS microphone, “because we determined that they were not
able to achieve the requisite level of performance in dynamic range
and frequency bandwidth associated with a single-chip approach
because of the single chips’ coupling resonance effects with the
package,” stated Harvey Weinstein, manager of ADI’s MEMS
applications group. The goal, he added, was to achieve performance
levels “much more demanding than those required by portable
electronics, which would include high-quality audio applications.”
[Stay tuned for upcoming special features in Small Times on
MEMS packaging and MEMS testing.]
Testing MEMS devices requires a major set of unique
considerations vs. what is typically seen in semiconductor test,
according to Dan Popa of the U. of Texas at Arlington’s Automation
and Robotics Research Institute (ARRI). “This is due to the fact
that MEMS devices tend to operate in a multi-domain environment…e.g.
electro-mechanical, electro-fluidic, electro-optic,
electro-chemical, etc. Therefore, the MEMS device must have a
stimulus representative of the similar stimulus of the intended
application to be properly tested.” In the case of an accelerometer,
a vibration table is required to “shake” the devices over their
measurement range and over their operating temperature range. The
creation of this test system is far more complex and tends to be a
custom solution approach. These test system designs need to be
addressed early in the MEMS development stage, and need to have
scalability capability from R&D testing of the devices to full
production. Typically, these systems are co-designed by the MEMS
device manufacturer and their test systems integrator. Since no
existing MEMS test foundries currently exist, facilities responsible
for the packaging of these devices use the test systems provided by
the MEMS manufactures to conduct final testing and calibration.
It is noteworthy that a recently created organization, MEMUNITY
(www.memunity.org), has assumed the role of educating the MEMS
industry about the intricacies of wafer-level packaging and how this
approach can enable the automated, high-throughput, low-cost testing
of MEMS devices. “VTI has extended the wafer-level test strategy to
the active calibration of our three-axis acceler-ometer product
line,” noted Scott Smyser, VTI’s VP and GM. “We believe that this
approach of active calibration is unique in the industry, and helps
us to dramatically reduce the cost of calibration and test of our
devices while providing a 100% level of testing.”
I have proposed an approach of “thinking outside the chip” in the
creation of a MEMS-based system solution, a.k.a. “MEMS modules.”
This approach requires a broad-based interdisciplinary team which
tends not to exist where the product needs to be developed, and
requires competencies in MEMS device design, wafer processing,
signal conditioning/ASIC design, packaging, testing/calibration,
supply chain management, and electronics system design. With the
availability of over 60 MEMS foundries worldwide, this takes the
pressure off the MEMS design and wafer process. Many MEMS companies
(Analog Devices, Freescale, Kionix, etc.) have internal ASIC device
designers. Companies including Si-Ware Systems and Sensor Platforms
provide signal conditioning ASIC design. Austria Microsystems
provides both ASIC design and ASIC manufacturing capabilities.
Backend network chips are available from a broad selection of
suppliers.
In my opinion, the real challenge is creating MEMS-based system
solutions that exactly address customers’ needs vis-à-vis classical
system integration and packaging/testing approaches. Many
organizations–including Axept, Crossbow, IMEC, Infotonics, LV
Sensors, Tronics, U. of Texas-Arlington/ARRI, and most recently
Acuity–have demonstrated the capability to undertake such a
systems-based solutions approach. In addition, organizations
including Fraunhofer’s Einrichtung Elektronische Nanosysteme
Institute (Chemnitz, Germany), the University of Michigan’s Wireless
Integrated Microsystems Research Center (WIMS), and ARRI are
focusing on this approach. Axept (Figure 5) has
integrated two separate pressure sensors along with a number of
discrete signal conditioning ICs to create a dual-redundant pressure
sensor module. It provides a virtual data acquisition platform
providing operational status assessment, sensor-drift compensation,
trend analysis, calibration setting by poling and voting, service
history recording, smart sensor recalibration algorithm, and sensor
status alerting.
Click here to enlarge
image
Figure 6:
Micro-optoelectromechanical (MOEMS) switch using a MEMS die,
four optical fibers, and wire bonds in a Kovar metal carrier.
The silicon die contains DRIE trenches for optical fibers,
along with electrothermal actuators that align the fibers to
Au-coated micromirror surfaces in order to switch power
through the device. (Courtesy: University of
Texas-Arlington/ARRI) |
UT Arlington’s ARRI (Figure 6) has created a
micro-opticalelectromechanical (MOEMS) switch module that includes a
MEMS die, four optical fibers, and wire bonds for interconnects
inside of a (hermetically sealed) Kovar metal carrier. Tire pressure
monitoring systems currently being produced in large volumes by
suppliers including Bosch, Freescale, and TRW are excellent examples
of MEMS-based systems solutions.
These systems (a.k.a. “modules”) embrace pressure sensors, motion
sensors, temperature sensors, signal conditioning, battery and
battery management, software algorithms, wireless communications,
and package integration and test–and are projected to be a major
“killer application” for MEMS in the very near future, approaching
100 million units worldwide in the early next decade. I believe that
there exists many other major opportunities for MEMS-based system
solutions in the near future. Carpe diem!
Roger H. Grace, president of Roger Grace
Associates (Naples, FL), is a technology marketing consultant to the
MEMS and nano industries with more than 35 years’ experience.
Contact him at rgrace@rgrace.com or www.rgrace.com. Small
Times December, 2008
Author(s) : Roger Grace
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