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Naval Grant Funds Development of Wafer-Scale, Single-Electron Memory Devices

February 28, 2005

The Office of Naval Research has awarded a three-year, $320,000 grant to Drs. Seong Jin Koh and Choong-Un Kim of The University of Texas at Arlington’s Materials Science & Engineering Program and the Nanotechnology Research & Teaching Facility to develop a technology for wafer-scale fabrication of single-electron memory devices.

Most memory chips currently in use require millions of electrons to store each bit of information, but single-electron memory devices use only a few tens of electrons to store a single bit, resulting in ultra-low power consumption and ultra-high density memories.

Although the potential benefit of single electron devices is clear, their fabrication technology, i.e., reliable production of addressable devices, is in its infancy. Combining wet chemistry, nanotechnology and CMOS fabrication technology, Drs. Koh and Kim will address several of critical fabrication issues that have hindered single electron device implementation.

Their new fabrication technology will provide a foundation for building reliable and practical single-electron devices that have two important merits: ultra-low power consumption and ultra-high sensitivity. These attributes are crucial to devices for the U.S. Navy, such as long-endurance unmanned aerial vehicles, communication devices and remote biological and chemical sensing units. Ultra-sensitive, molecular-level sensors could play a critical role in detecting battlefield hazards and combating bio/chemical terrorism.